(a) Field of the Invention
The present invention relates to a liquid crystal display (LCD). More specifically, the present invention relates to a thin film transistor liquid crystal display (TFT LCD).
(b) Description of the Related Art
In a TFT LCD, an electric field is supplied to liquid crystal material having an anisotropic transmittivity injected between two panels, and the amount of the light penetrating the panels is adjusted by controlling the strength of the electric field to obtain desired pixel signals.
In the TFT LCD panel, a plurality of gate lines lie in parallel, and a plurality of insulated data lines lie across the gate lines. The square area made by the gate line and the data line forms a pixel. A TFT is formed at a point where a gate line of each pixel crosses a data line of a pixel.
FIG. 1 shows an equivalent circuit for a pixel in a conventional TFT LCD. As shown, a gate electrode g, a source electrode s, and a drain electrode d of the TFT 10 are coupled to a gate line Gn, a data line Dm, and a pixel electrode P, respectively. Liquid crystal material injected between the pixel electrode P and common electrode Com is equivalently indicated as a crystal capacitance Clc. A storage capacitance Cst is made between the pixel electrode P and a gate line Gnxe2x88x921. A parasitic capacitance Cgd caused by misalignment is made between the gate electrode g and drain electrode d. The liquid crystal capacitance Clc and the storage capacitance Cst function as a load on the TFT LCD.
The operations of the TFT LCD will now be described.
When a gate ON voltage Von is supplied to the gate electrode g which is coupled to the gate line Gn so as to drive the TFT 10, a data voltage indicating a pixel signal is supplied to the source electrode s, and the data voltage is then supplied to the drain electrode d. From the drain electrode d, the data voltage is supplied to both the liquid crystal capacitance Clc and the storage capacitance Cst through the pixel electrode P. An electric field is generated by the voltage difference between the pixel electrode P and the common electrode Com. If an electric field continues to be applied to the liquid crystal material in one direction, the liquid crystal material may deteriorate. Therefore, in order to avoid this problem, the pixel signals are switched from a positive value to a negative value with respect to a common voltage. This technique is referred to as an inversion drive method.
The voltage supplied to the crystal capacitance Clc and the storage capacitance Cst when the TFT is turned on is supposed to be kept constant after the TFT is turned off. However, due to the parasitic capacitance Cgd between the gate electrode and the drain electrode, the voltage supplied to the pixel electrode is distorted. The distorted voltage is called a kickback voltage xcex94V, which is described by Equation 1.       Equation 1:              Δ      ⁢              xe2x80x83            ⁢      V        =                                                      C              ⁢                              xe2x80x83                            ⁢              g              ⁢                              xe2x80x83                            ⁢              d                                                      C                ⁢                                  xe2x80x83                                ⁢                g                ⁢                                  xe2x80x83                                ⁢                d                            +                              C                ⁢                                  xe2x80x83                                ⁢                s                ⁢                                  xe2x80x83                                ⁢                t                            +                              C                ⁢                                  xe2x80x83                                ⁢                l                ⁢                                  xe2x80x83                                ⁢                c                                              ·          Δ                ⁢                  xe2x80x83                ⁢        V        ⁢                  xe2x80x83                ⁢        g            =                                    C            ⁢                          xe2x80x83                        ⁢            g            ⁢                          xe2x80x83                        ⁢            d                                              C              ⁢                              xe2x80x83                            ⁢              g              ⁢                              xe2x80x83                            ⁢              d                        +                          C              ⁢                              xe2x80x83                            ⁢              s              ⁢                              xe2x80x83                            ⁢              t                        +                          C              ⁢                              xe2x80x83                            ⁢              l              ⁢                              xe2x80x83                            ⁢              c                                      ·                  (                      Von            -            Voff                    )                    
where xcex94Vg is a variance of the gate voltage, that is, a difference between the gate ON voltage Von and gate OFF voltage Voff.
The voltage distortion always tends to reduce the voltage of the pixel electrode regardless of the polarity of the data voltage, as shown in FIG. 2.
Referring to FIG. 2, Vg, Vd, and Vp indicates the gate voltage, data voltage, and pixel electrode voltage. Vcom and xcex94V indicates a common electrode voltage (common voltage) and kickback voltage, respectively.
In an ideal TFT LCD as shown by a dotted Vd line in FIG. 2, when the gate voltage Vg is turned on, the data voltage Vd is applied to the pixel polarity, and thereby, when the gate voltage is turned off, the applied data voltage should be maintained. But in an actual TFT LCD as shown by a solid Vp line in FIG. 2, when the gate voltage falls, the pixel voltage Vp is reduced by the kickback voltage xcex94V.
An actual value of the voltage supplied to the liquid crystal is obtained from the area between the pixel voltage Vp and common voltage Vcom lines in FIG. 2. When an LCD is driven by an inversion drive method, the level of the common voltage must be adjusted to keep the above-noted area equal during the period of the gate voltage switching. Therefore, a common voltage satisfying the above-mentioned condition needs to be supplied to the common electrode.
However, as the shapes of these above-noted areas in each half of the gate voltage switching cycle (or frame) are not identical, the amount of the pixel voltage supplied to each pixel becomes different for each frame, which causes a flicker whenever the pixel voltage is inverted.
Even when a constant common voltage that can make the above-noted areas equal is supplied to the common electrode in order to suppress the flicker phenomena, the flicker phenomena still may continue.
Generally, the gate lines have both resistance and parasitic capacitance. Accordingly, the gate voltage is hence delayed by a time constant determined by the product of resistance and parasitic capacitance. As the size of the LCD panel becomes bigger, the signal delay becomes longer.
FIG. 3 shows a sketch of a measured value of the gate voltage Vg which is delayed due to the length of the gate line. Vg1 represents the gate voltage measured on the gate line near the gate voltage input terminal (or the gate driver output terminal), and Vg2 represents the gate voltage measured on the gate line far from the gate voltage input terminal.
Hence, the further from the gate voltage input terminal, (i.e., the more the gate signal is delayed), the more the variance of the gate voltage (xcex94Vg in Equation 1, which represents the difference between the gate ON voltage Von and gate OFF voltage Voff) becomes smaller, and thereby the kickback voltage xcex94V decreases as shown by Equation 1.
Therefore, even when a constant common voltage is used, this voltage cannot maintain the mid-voltage value for all the pixels. Accordingly, pixel voltages may still vary from frame to frame and the flicker phenomenon will still continue. As LCD screens become larger and therefore the gate lines become longer, it happens more frequently.
It is an object of the present invention to provide an apparatus for preventing flickers caused by signal delays of the gate voltage.
In order to achieve this objective, the present invention provides a liquid crystal display that comprises a first panel including a plurality of thin film transistors, a plurality of gate lines, a plurality of insulated data lines crossing the gate lines and a plurality of pixel electrodes. The liquid crystal display device also comprises a second panel having a common electrode facing the pixel electrode, a gate driver that turns on and off the thin film transistors, a data driver that supplies a data voltage to the data lines, and a common voltage generator that supplies a first common voltage and a second common voltage. The second common voltage is higher than the first common voltage, and the voltage difference between the first common voltage and second the common voltage is adjusted. The common voltage generator comprises a voltage supply, a first resistor and a second resistor. The first resistor or the second resistor may be a variable resistor.
The voltage difference between the first common voltage and the second common voltage is equal to the voltage difference between a pixel electrode kickback voltage at the first point and a pixel electrode kickback voltage at the second point.
The present invention adjusts the voltage difference of the common voltage generator by adjusting the value of a variable resistor, and prevents a flicker.